FPGA Design Verification Specialist

3 weken geleden

Eindhoven, Noord-Brabant, Nederland Trinamics Beheer B.V. Voltijd
Job Description

We are seeking a skilled FPGA Design Verification Engineer to join our team at Trinamics Beheer B.V. The ideal candidate will have a strong background in digital design and verification, with experience in UVM and System Verilog.

Key Responsibilities
  • Develop and manage UVM test benches for FPGA-based hardware designs.
  • Create and execute detailed test plans to validate the functionality of FPGA devices.
  • Continuously improve verification methodologies and processes to enhance efficiency and quality.
  • Design, realize, integrate, and test systems or subsystems for future products.
  • Work with a focus on consumer needs and technological competitiveness, having an outside-in approach for the designs created and the knowledge shared with the team.

Requirements
  • Proven experience with FPGA design and verification using UVM and System Verilog.
  • A Bachelor or Master Degree in Electrical Engineering, Informatics, Computer Science, or equivalent.
  • 5+ years of experience in VHDL and Verilog coding.
  • 5+ years of experience in System Verilog for verification.
  • Familiarity with industry standards and best practices for FPGA verification.

What We Offer
  • A challenging and varied position in a professional, high-tech environment.
  • An appropriate salary based on experience and education.
  • Future prospects and excellent benefits.
  • After a period of secondment and functioning properly, the opportunity to be contracted by our client.
  • Good secondary conditions, including a minimum of 25 holidays and 8.33% holiday allowance.
  • Courses to develop professionally and personally via Trinamics Academy.
  • Discount on healthcare and referral bonuses, as well as fun activities.

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