Huidige banen gerelateerd aan IC Physical Design Engineer - Eindhoven, Noord-Brabant - Snap Inc.
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Senior DFT Engineer
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Staff Packaging Integration Specialist
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Analog IC Design Engineer
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Eindhoven, Noord-Brabant, Nederland Brunel Nederland B.V. VoltijdJob DescriptionBrunel Nederland B.V. is seeking a skilled Analog IC designer to drive the architecture, implementation, verification, and documentation of high-performance analog & RF IP in modern cutting-edge CMOS processes.Key ResponsibilitiesDrive and Realize Architecture: Develop and implement high-performance analog & RF IP in modern CMOS...
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Senior Analog IC Design Engineer
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Eindhoven, Noord-Brabant, Nederland Brunel Nederland B.V. VoltijdOverviewBrunel Nederland B.V. is a leading company in the field of analog and RF IP development, pushing the boundaries of innovation with cutting-edge CMOS processes.SalaryWe offer a highly competitive salary package, reflecting our commitment to attracting and retaining top talent in the industry. Based on national averages and industry standards, we...
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Analog IC Design Engineer
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Digital ASIC Design Engineer
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Senior DFT Engineer
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Eindhoven, Noord-Brabant, Nederland IC Resources VoltijdSenior DFT EngineerAn exciting opportunity has arisen for a Senior DFT Engineer to join our team at IC Resources. We are looking for a highly skilled professional with a strong track record in DFT gained across several successful ASIC projects. Key responsibilities include implementing DFT infrastructure and experience generating and debugging Scan ATPG...
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Digital ASIC Design Engineer
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IC Physical Design Engineer
2 maanden geleden
Snap Inc. is a technology company that believes the camera presents the greatest opportunity to improve the way people live and communicate. Our mission is to empower people to express themselves, live in the moment, learn about the world, and have fun together.
Job SummaryWe are seeking a highly skilled IC Physical Design Engineer to join our team at Snap Lab, where we are pushing the boundaries of what a camera can be. As a member of our silicon design team, you will be responsible for ensuring that our designs achieve specified timing, while maintaining low power and small silicon area.
Key Responsibilities:- Contribute to the development of artificial intelligence ASICs for wearable devices
- Design and implement physical implementation of netlists to GDSII
- Drive partners to ensure smooth execution and meet PPA targets
- Facilitate feedback to design teams on architecture improvements
- Architect floor plan strategy with silicon design teams
- Define design partitioning with external partners and silicon design teams
- Work on timing closure and power closure
- Lead DRC/LVS analysis and resolve related issues
- Conduct physical design experiments for future chips
- Improve CAD methodology for better PPA
- 7+ years of experience in similar roles in an industrial setting
- MSc degree in related field such as electrical engineering or equivalent years of experience
- Excellent understanding of physical aspects of silicon design
- Extensive experience with timing closure and power optimization
- Solid experience with building power grid and clock tree structures
- Deep understanding of Physical Design Verification methodology
- Proven leadership skills and ability to grow and shape the organization
At Snap Inc., we believe in creating a diverse and inclusive work environment. We offer a competitive compensation package, comprehensive medical coverage, emotional and mental health support programs, and a chance to work on cutting-edge technology.
We are an equal opportunity employer and welcome applications from diverse candidates. If you have a disability or special need that requires accommodation, please let us know.
