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Lithography System Performance Architect

1 maand geleden

Veldhoven, Nederland ASML Voltijd

**Introduction to the job**:
Wafer Defectivity (PWP) is important for "Cost of Technology" at our customers and the ASML EUV Roadmap requires ~ 10 x improvement for new products.

In this context we need an experienced Architect with background in Hardware development at ASML to direct developments and to work with Functional Clusters, System Engineering, CS, Marketing and Customers to meet the Defectivity targets for future products and to solve issues.

**Role and responsibilities**:

- Definition of work packages to meet Wafer Defectivity targets for new products and to solve issues
- Support HW development with Defectivity competence
- Validate performance of solutions (alpha and beta testing)
- Technical lead for engineers for setting directions for studies and structural improvements
- Customer communication and escalation support
- Coaching and mentoring of junior engineers

All in close collaboration with Functional Clusters and System Engineering

**Education and experience**:
Master degree in Mechanical Engineering (preferred), Mechatronics or Physics

At least 5 years experience in hardware development at ASML

**Skills**:

- Knowledge of and experience in HW development at ASML (e.g. scanner knowledge, scanner tests)
- Strong analytical skills
- Highly competent n collaboration and communication

**Other information**:
**For information ask Richard Oostveen, GL EUV Wafer Defectivity**

EOE AA M/F/Veteran/Disability

**Diversity and inclusion**:
ASML is an Equal Opportunity Employer that values and respects the importance of a diverse and inclusive workforce. It is the policy of the company to recruit, hire, train and promote persons in all job titles without regard to race, color, religion, sex, age, national origin, veteran status, disability, sexual orientation, or gender identity. We recognize that diversity and inclusion is a driving force in the success of our company.