Senior Digital Design Engineer

3 weken geleden


Rijswijk, Zuid-Holland, Nederland SiTime Voltijd

About the Role

We are seeking a highly skilled Senior Digital Design Engineer to join our team at SiTime. As a key member of our digital design team, you will be responsible for developing micro-architecture specifications, designing Register Transfer Level (RTL) circuits, and verifying digital logic designs.

Key Responsibilities

  • Develop micro-architecture specifications from Product Requirement Documents (PRDs)
  • Design RTL circuits using Verilog or SystemVerilog
  • Develop standalone test benches to verify RTL behavior
  • Write and verify SystemVerilog Assertions (SVA) for designs
  • Write timing constraints and clock definitions for synthesis and place and route tools
  • Run industry-standard synthesis tools and troubleshoot timing issues
  • Understand design tradeoffs and improve timing, area, and power
  • Read and understand Static Timing Analysis (STA) reports
  • Cross-functional interactions with analog, verification, backend, system, and test engineering teams

Requirements

  • Master's degree in electrical engineering with 5 years of relevant experience
  • Excellent verbal and written communication skills in English
  • Proficient in Verilog and SystemVerilog
  • Expertise in digital logic design fundamentals
  • Experience in designing mixed-signal digital logic
  • Basic understanding of Discrete time Signal Processing theory
  • Solid experience in digital design flow

About SiTime

SiTime Corporation is a precision timing company that offers a rich feature set of semiconductor MEMS programmable solutions. Our products enable customers to differentiate their products with higher performance, smaller size, lower power, and better reliability. With more than 3 billion devices shipped, SiTime is changing the timing industry.


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