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Senior VHDL Design Engineer

2 maanden geleden

Almelo, Overijssel, Nederland Trinamics Beheer B.V. Voltijd

About the Role

We are seeking a highly skilled Senior VHDL Design Engineer to join our team at Trinamics Beheer B.V. as a key member of our Electrical Engineering department. As a Senior VHDL Design Engineer, you will play a crucial role in designing, implementing, and verifying complex electronic systems.

Key Responsibilities

  • Design and develop VHDL code for FPGAs, ensuring high-quality and efficient implementation.
  • Collaborate with cross-functional teams, including hardware and embedded software development, to deliver complete systems.
  • Oversee the simulation, implementation, and verification of electronic circuits, utilizing industry-standard tools and equipment.
  • Develop and maintain technical documentation, ensuring clarity and accuracy.
  • Stay up-to-date with industry trends and advancements, applying knowledge to improve design and implementation processes.

Requirements

  • Bachelor's or Master's degree in Electrical & Electronics Engineering.
  • Minimum 8 years of experience in VHDL design within product development, with a strong background in FPGA design.
  • Proven expertise in utilizing simulation tools and measurement equipment for digital circuits, including FPGAs, CPLDs, and standard interfaces.
  • Fluent in English, with excellent communication and collaboration skills.

What We Offer

  • Competitive salary (€75,000 - €85,000) and outstanding benefits package.
  • 27 vacation days and 13 ATV days, plus holiday allowance.
  • Flexible working hours, allowing you to manage your schedule and ensure work completion.
  • Quarterly bonus based on revenue (up to 5%).