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Senior VHDL Design Engineer

2 maanden geleden

Almelo, Overijssel, Nederland Trinamics Beheer B.V. Voltijd
Join Trinamics Beheer B.V. as a Senior VHDL Design Engineer and take charge of designing, implementing, and verifying complex digital systems. As a key member of our global team, you will contribute to the development of complete (sub-)systems, leveraging your expertise in VHDL code and simulation tools. Your collaboration with other disciplines, including hardware and embedded software development, will drive innovation and excellence in our products.

Key Responsibilities:

* Design, simulate, implement, and verify FPGA circuits using VHDL code
* Collaborate with cross-functional teams to develop and integrate digital systems
* Utilize simulation tools and measurement equipment for digital circuits, including FPGAs, CPLDs, and standard interfaces
* Ensure compliance with industry standards and best practices

Requirements:

* Bachelor or Master in Electrical & Electronics Engineering
* Minimum 8 years of experience in VHDL design within product development
* Proficiency in utilizing simulation tools and measurement equipment for digital circuits
* Fluency in English

What We Offer:

* Competitive salary (75k-85k)
* Outstanding benefits, including 27 vacation days and 13 ATV days, holiday allowance, and flexible working hours
* Quarterly bonus based on revenue (up to 5%)

If you are a motivated and experienced VHDL design engineer looking to take your career to the next level, we encourage you to apply for this exciting opportunity.