Principal Digital Design Engineer

1 maand geleden


Rotterdam, Zuid-Holland, Nederland Rambus Voltijd
About the Role
Rambus is seeking a highly skilled Principal Digital Design Engineer to join our team in cryptography and security. This is an exciting opportunity to work on the next generation Root-of-Trust product, driving innovation and improvement in product quality and safety.

Key Responsibilities
As a Principal Digital Design Engineer, you will be responsible for:
  • Collaborating with architects to learn the Crypto-Manager Root-of-Trust product.
  • Jointly architecting and developing the next generation Root-of-Trust product.
  • Working closely with the Software Team, Product Managers, Security experts, and other stakeholders to define the next generation security products.
  • Driving improvement in product quality and safety.
  • Being the expert line of support for servicing customers.
  • Ensuring the delivered product and documentation adheres to Rambus quality and safety standards.

Requirements
To succeed in this role, you will need:
  • A BS/MS degree in electrical or computer engineering.
  • Work experience in digital design as a hardware engineer or test engineer.
  • Demonstrated proficiency in Verilog/(or VHDL) and digital design.
  • Expertise in secure hardware design, cryptographic algorithms and side-channel attacks, high performance CPU architecture and design, modern SoC design methodologies and architectures, low-power design techniques, clock and reset domain crossing techniques, DFT, especially memory testing and characterization, and logic BIST methodologies.
  • Hardware development experience in UNIX/Linux environments, including supporting tasks such as shell scripting and basic Perl scripts.
  • Ability to work with technical writers in the creation of technical documentation.

Preferred Tools and Technologies
We are looking for candidates with experience in the following tools and technologies:
  • Verilog (or VHDL), SystemVerilog, Perl, Shell scripting, Python, Sage, Tcl, Xilinx Vivado, Unix, Linux, front-end ASIC design tools, especially Synopsys Design Compiler, Cadence Genus, Synopsys Spyglass, Cadence Conformal(-LP) ASIC simulation/verification tools, especially Cadence Xcelium, Synopsys Verdi, Mentor Questa Formal Verification.

About Rambus
Rambus leads the industry with products and solutions that speed performance, expand capacity, and improve security for today's most demanding applications. From data center and edge to artificial intelligence and automotive, our interface and security IP, and memory interface chips enable SoC and system designers to deliver their vision of the future.

Estimated Salary Range
$120,000 - $180,000 per year.

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