Senior VHDL Design Engineer
7 dagen geleden
Key Responsibilities:
* Design, simulate, implement, and verify FPGA circuits using VHDL code
* Collaborate with cross-functional teams to develop and integrate digital systems
* Utilize simulation tools and measurement equipment for digital circuits
* Ensure compliance with industry standards and best practices
Requirements:
* Bachelor or Master in Electrical & Electronics Engineering
* Minimum 8 years of experience in VHDL design within product development
* Proficiency in utilizing simulation tools and measurement equipment for digital circuits
* Fluent in English
What We Offer:
* Competitive salary (75k-85k)
* Outstanding benefits, including 27 vacation days and 13 ATV days
* Flexible working hours and quarterly bonus based on revenue (up to 5%)
If you are a motivated and experienced VHDL design engineer looking to take your career to the next level, we encourage you to apply for this exciting opportunity.
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